1. Field of the Invention
The present invention relates to a semiconductor device used as an ID chip. In particular, the invention relates to a semiconductor device used as an ID chip formed on an insulating substrate such as glass and plastic.
In this specification, an ID chip refers to a semiconductor chip used for identification of an object, which is used for an IC tag, a wireless tag, a wireless chip, an RFID, an IC card and the like.
2. Description of the Related Art
As a computer technology and an image recognition technology advance, data recognition by using a medium such as a barcode is widely used for recognition of merchandise data and the like. It is expected that more amount of data recognition will be required in the future. On the other hand, when reading data with a barcode, there are such disadvantages that a barcode reader has to touch the barcode for reading and a barcode cannot store much data. Therefore, data recognition without contact and increase in memory size of a medium are demanded.
In response to such demands, an ID chip using an IC is developed in recent years. An ID chip stores required data in a memory circuit within an IC chip and the data is read out by using a non-contact means, that is generally a wireless means. It is expected that commercial distribution becomes simpler and cost is reduced by translating such an ID chip into a practical use.
FIG. 2 shows an example of such an ID chip technology. An IC chip 200 includes an antenna circuit 201, a rectifier circuit 202, a stabilizing power source 203, an amplifier 204, a divider circuit 205, a mask ROM 206, a logic circuit 207, and a switching transistor 208. Further, the antenna circuit 201 includes an antenna coil 210, a tuning capacitor 211, and a coupling capacitor 212. The rectifier circuit 202 is configured of diodes 213 and 214 and a smoothing capacitor 215.
An operation of such an IC tag is described now. An alternating signal received by the antenna circuit 201 is provided with a half-wave rectification by the diodes 213 and 214 and smoothed by the smoothing capacitor 215. This smoothed voltage includes a number of ripples, therefore, it is stabilized by the stabilizing power source 203 and the stabilized voltage is supplied to the amplifier 204, the divider circuit 205, the mask ROM 206, and the logic circuit 207. Note that the ripple corresponds to a difference between the highest voltage and the lowest voltage of a power source voltage. On the other hand, an alternating signal received in the antenna 201 is inputted to the divider circuit 205 through the amplifier 204, thereby divided. In the case where a signal received at an antenna is 13.56 MHz, the signal is divided into 8 and 16. Then, the divided signals are used for reading out the data stored in the mask ROM 206. Next, the data in the mask ROM 206 are processed in the logic circuit 207 of which output operates the switching transistor 208.
When the switching transistor 208 is turned ON, an output of the antenna circuit is grounded to GND, thereby impedance of the antenna is changed. Accordingly, a signal of an interrogator which is reflected on the antenna of an ID chip changes. When the interrogator reads this change, data stored in the mask ROM of the ID chip can be recognized. Note that such an ID chip incorporating an antenna is referred to as an RFID chip.
Further, a mask ROM is used as a ROM in the aforementioned example, however, a ROM such as an EEPROM which is rewritable is mounted and developed as well. FIG. 3 shows an example of an ID chip incorporating an EEPROM. An ID chip 300 shown in FIG. 3 includes an antenna circuit 301, a rectifier circuit 302, a stabilizing circuit 303, an amplifier 304, a divider circuit 305, an EEPROM 306, a logic circuit 307, and a switching transistor 308. Further, the antenna circuit 301 includes an antenna coil 310, a tuning capacitor 311, and a coupling capacitor 312. The rectifier circuit 302 includes diodes 313 and 314 and a smoothing capacitor 315.
An operation of the ID chip 300 is described now. An alternating signal received by the antenna circuit 301 is provided with a half-wave rectification by the diodes 313 and 314 and smoothed by the smoothing capacitor 315. This smoothed voltage includes a number of ripples, therefore, it is stabilized by the stabilizing power source 303 and the stabilized voltage is supplied to the amplifier 304, the divider circuit 305, the EEPROM 306, and the logic circuit 307. On the other hand, an alternating signal received by the antenna circuit 301 is inputted to the divider circuit 305 through the amplifier 304, thereby divided. In the case where a signal received at an antenna is 13.56 MHz, the signal is divided into 8 and 16. Then, the divided signals are used for reading out the data stored in the EEPROM 306. Next, the data in the EEPROM 306 are processed in the logic circuit 307 of which output operates the switching transistor 308.
When the switching transistor 308 is turned ON, an output of the antenna circuit 301 is grounded to GND, thereby impedance of the antenna is changed. Accordingly, a signal of an interrogator which is reflected on the antenna of an ID chip changes. When the interrogator reads this change, data stored in the EEPROM of the ID chip can be recognized.
When writing data into an EEPROM, a voltage higher than a normal operation voltage is required. In FIG. 3, an alternating signal is generated by using a ring oscillator 316. By using the alternating signal, a charge pump 309 is operated to boost an output of the stabilizing power source 303 to be used in the EEPROM.
Patent Document 1 is an example of such an ID chip.    [Patent Document 1]    Japanese Patent Laid-Open No. 2001-250393